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Title:
Zirconia-germanium interface photoemission spectroscopy using synchrotron radiation
Authors:
Chui, Chi On; Lee, Dong-Ick; Singh, Andy A.; Pianetta, Piero A.; Saraswat, Krishna C.
Affiliation:
AA(Department of Electrical Engineering, Stanford University, Stanford, California 94305), AB(Stanford Synchrotron Radiation Laboratory, Stanford University, Stanford, California 94309), AC(Stanford Synchrotron Radiation Laboratory, Stanford University, Stanford, California 94309), AD(Stanford Synchrotron Radiation Laboratory, Stanford University, Stanford, California 94309), AE(Department of Electrical Engineering, Stanford University, Stanford, California 94305)
Publication:
Journal of Applied Physics, Volume 97, Issue 11, pp. 113518-113518-6 (2005). (JAP Homepage)
Publication Date:
06/2005
Origin:
AIP
PACS Keywords:
Interfaces; heterostructures; nanostructures, Surface states, band structure, electron density of states, Field effect devices
Abstract Copyright:
(c) 2005: American Institute of Physics
DOI:
10.1063/1.1922090
Bibliographic Code:
2005JAP....97k3518C

Abstract

An ultrathin zirconia gate dielectric had been successfully incorporated into germanium metal-oxide-semiconductor (MOS) devices demonstrating very high-permittivity gate stacks with no apparent interfacial layer. In this study, synchrotron-radiation photoemission spectroscopy has been applied on the same gate stack to identify and quantify the presence of any interfacial germanium suboxide layer. By taking progressive core-level spectra during the layer-by-layer removal of the zirconia film, an oxidized germanium layer with submonolayer thickness was found, possibly arising from an interfacial Zr-O-Ge bonding configuration. In addition, the offsets in the valence-band spectra were also monitored and the energy-band diagram of the zirconia-germanium heterostructure was constructed. Compared to high-κ gate stacks on Si, the thinner interfacial layer and larger conduction-band offset in high-κ gate stacks on Ge suggest better scalability towards an ultimately higher MOS gate capacitance.
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